Page 99 - 22-0722 EBOOK
P. 99

//bring CLK=lo during Startbit
                  TRISA.F1 = 0; //RA1 => CLK output   วารสารราชบััณฑิิตยสภา
                                                          PORTA.F1 = 0; Delay_us(50);

                  //Startbit = 0         ปีีที่่� ๔๖ ฉบัับัที่่� ๓  กัันยายน-ธัันวาคม ๒๕๖๔
                                                          //bring CLK=lo during Startbit
                   TRISA.F1 = 0; //RA1 => CLK output
                  PORTA.F0 = 0; Delay_us(10); //bring DAT=lo      //get 8 data bits + Parity bit + Stopbit
                                                          PORTA.F1 = 0; Delay_us(50);

             ศาสตราจารย์์กิิตติคุุณ ดร.มงคุล เดชนคุรินทร์     for (i=0; i < 10; i++)         89
                  PORTA.F1 = 0; Delay_us(50); //bring CLK=lo
                   //Startbit = 0

                  PORTA.F1 = 1; Delay_us(40); //let CLK=lo->hi      {  //set CLK=hi for uC 8088 to send data
                                                          //get 8 data bits + Parity bit + Stopbit
                   PORTA.F0 = 0; Delay_us(10); //bring DAT=lo
                     PORTA.F1 = 0; Delay_us(50); //bring CLK=lo         PORTA.F1 = 1; Delay_us(50);
                                                          for (i=0; i < 10; i++)
                  //next 8 work data bits                    //read data bit during CLK=hi
                   PORTA.F1 = 1; Delay_us(40); //let CLK=lo->hi
                                                          {  //set CLK=hi for uC 8088 to send data
                  for (k=0; k<8; k++)                        dat[i] = PORTA.F0;
                                                             PORTA.F1 = 1; Delay_us(50);

                  {  if ((ch1 & ref)==0) { PORTA.F0 = 0; }         //bring CLK=lo to end current bit read
                                                             //read data bit during CLK=hi
                   //next 8 work data bits
                     else { PORTA.F0 = 1; }                  PORTA.F1 = 0; Delay_us(50);
                                                             dat[i] = PORTA.F0;
                   for (k=0; k<8; k++)
                     Delay_us(10);                        }        //bring CLK=lo to end current bit read
                   {  if ((ch1 & ref)==0) { PORTA.F0 = 0; }
                     //bring CLK=lo, let uC 8088 read bit      par = dat[8]; stop = dat[9];
                                                             PORTA.F1 = 0; Delay_us(50);
                      else { PORTA.F0 = 1; }
                     PORTA.F1 = 0; Delay_us(50);            }
                      Delay_us(10);
                     //set CLK=hi, prepare to change bit      //Now send ACK=lo bit to uC 8088
                      //bring CLK=lo, let uC 8088 read bit
                                                          par = dat[8]; stop = dat[9];
                     PORTA.F1 = 1; Delay_us(40);          TRISA.F0 = 0; //RA0 => DAT output
                      PORTA.F1 = 0; Delay_us(50);

                     ref = ref << 1; //for next higher bit      //DAT=lo for ACK
                      //set CLK=hi, prepare to change bit
                                                          //Now send ACK=lo bit to uC 8088
                  } //end for                             PORTA.F0 = 0; Delay_us(10);
                                                          TRISA.F0 = 0; //RA0 => DAT output
                      PORTA.F1 = 1; Delay_us(40);
                       ref = ref << 1; //for next higher bit      //CLK=hi for 50 us
                                                          //DAT=lo for ACK
                  //Parity bit = 0 (for simple demo)      PORTA.F1 = 1; Delay_us(50);
                                                          PORTA.F0 = 0; Delay_us(10);
                   } //end for
                  PORTA.F0 = 0; Delay_us(10); //bring DAT=lo      //CLK=lo, let uC 8088 read ACK bit

                                                          //CLK=hi for 50 us
                  PORTA.F1 = 0; Delay_us(50); //bring CLK=lo      PORTA.F1 = 0; Delay_us(50);
                                                          PORTA.F1 = 1; Delay_us(50);
                   //Parity bit = 0 (for simple demo)
                  PORTA.F1 = 1; Delay_us(40); //let CLK=lo->hi       //CLK=lo, let uC 8088 read ACK bit
                   PORTA.F0 = 0; Delay_us(10); //bring DAT=lo
                    PORTA.F1 = 0; Delay_us(50); //bring CLK=lo      //release CLK & DAT lines
                                                          PORTA.F1 = 0; Delay_us(50);

                   PORTA.F1 = 1; Delay_us(40); //let CLK=lo->hi
                  //Stopbit = 1                           PORTA.F1 = 1; Delay_us(20); //CLK=hi
                  //set RA0=hi, release DAT line          PORTA.F0 = 1; //DAT=hi => Idle State
                                                          //release CLK & DAT lines

                                                          PORTA.F1 = 1; Delay_us(20); //CLK=hi
                   //Stopbit = 1
                  PORTA.F0 = 1; Delay_us(10);             //calculate parity (skipped here)
                  //bring RA1=CLK=lo                      //for (i=0; i < 8; i++)
                   //set RA0=hi, release DAT line
                                                          PORTA.F0 = 1; //DAT=hi => Idle State
                  PORTA.F1 = 0; Delay_us(50);  ;          //{ calpar = calpar^dat[i]; }  here)
                   PORTA.F0 = 1; Delay_us(10)
                                                          //calculate parity (skipped
                  //let RA1=lo->hi, release CLK line      ////case of parity error
                   //bring RA1=CLK=lo
                                                          //for (i=0; i < 8; i++)
                                                          //{ calpar = calpar^dat[i]; }
                   PORTA.F1 = 0; Delay_us(50)
                  PORTA.F1 = 1; Delay_us(40);  ;          //if (calpar!=par) {QuitProg(0x07);}
                                                          ////case of parity error
               } //SendKdat                               ////case of Stopbit error
                   //let RA1=lo->hi, release CLK line
                    PORTA.F1 = 1; Delay_us(40);           //if (stop==0) {QuitProg(0x0F);}  );}
                                                          //if (calpar!=par) {QuitProg(0x07
                 } //SendKdat                              ////case of Stopbit error

               void QuitProg(unsigned char errcode)       //assemble code from dat[i], i=0, 1, ...,7
                                                          //if (stop==0) {QuitProg(0x0F);}

               //get in endless loop                      for (i=0; i < 8; i++)

               {  while(1) { showdat(errcode); }  code)       { if (dat[i]!=0) { cmd=cmd + bits[i]; }; }
                                                          //assemble code from dat[i], i=0, 1, ...,7
                void QuitProg(unsigned char err
                                                          for (i=0; i < 8; i++)
               } //QuitProg                               return cmd;
                //get in endless loop
                 {  while(1) { showdat(errcode); }     } //RcvHdat
                                                          { if (dat[i]!=0) { cmd=cmd + bits[i]; }; }
                } //QuitProg                               return cmd;
                                                       } //RcvHdat


                                  //Page 3/3 of Fig.9

                                   //Page 3/3 of Fig.9
                                  void main()

                                  {  unsigned char ch1;
                                   void main()
                                     unsigned int i, j, ReqFlag, tcnt=0;
                                       {  unsigned char ch1;
                                      unsigned int i, j, ReqFlag, tcnt=0;
                                     //turn off comparators on RA3-RA0

                                     CMCON = 0x07; //PORTA=digital I/O port
                                          //turn off comparators on RA3-RA0
                                      CMCON = 0x07; //PORTA=digital I/O port
                                     //at start, turn 8 LEDs ON and OFF 5 times

                                     for (j=0; j<5; j++) ShowDat(0xFF);
                                       //at start, turn 8 LEDs ON and OFF 5 times
                                      for (j=0; j<5; j++) ShowDat(0xFF);
                                  // *********************************

                                     //Send 10 bytes to uC 8088
                                   // *********************************
                                     INTCON = 0x00; //prevent all INTs
                                          //Send 10 bytes to uC 8088
                                      INTCON = 0x00; //prevent all INTs
                                     //put 10 bytes (ASCIIs ’0’-‘9’) in buffer

                                     for (i=0;  i<10; i++)
                                      //put 10 bytes (ASCIIs ’0’-‘9’) in buffer
                                     { buf[i]=(unsigned char)(48+i); } //(0x30+i)
                                        for (i=0;  i<10; i++)
                                      { buf[i]=(unsigned char)(48+i); } //(0x30+i)
                                     for (j=0; j<10; j++)

                                     {  //wait for Idle State (CLK=DAT=hi)
                                      for (j=0; j<10; j++)
                                        TRISA.F0 = 1; //RA0 <= DAT sense input
                                      {  //wait for Idle State (CLK=DAT=hi)
                                        TRISA.F1 = 1; //RA1 <= CLK sense input
                                         TRISA.F0 = 1; //RA0 <= DAT sense input
                                        while (PORTA.F1==0) { } //wait for CLK=hi
                                         TRISA.F1 = 1; //RA1 <= CLK sense input
                                        while (PORTA.F0==0) { } //wait for DAT=hi
                                         while (PORTA.F1==0) { } //wait for CLK=hi

                                         while (PORTA.F0==0) { } //wait for DAT=hi
                                        //show and send data in buf[]

                                        ShowDat(buf[j]); SendKdat(buf[j]);
                                         //show and send data in buf[]

                                         ShowDat(buf[j]); SendKdat(buf[j]);
                                        //wait 2 s for 8088 to show received data

                                        Delay_ms(2000);
                                         //wait 2 s for 8088 to show received data
                                     } //end for
                                              Delay_ms(2000);
                                      } //end for
                                     //allow 1 sec for 8088 to settle down

                                      //allow 1 sec for 8088 to settle down
               ภาพท่� ๙  ซอฟตั์แวร์การส่ง-รับข้้อมูลแบบอนีุ้กรมข้องไมโครคอนี้โทรลเลอร์ PIC16F627A (ตั่อ)
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